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Pascal Giard, P.Eng., Ph.D.

Associate Professor of Electrical Engineering at École de technologie supérieure (ETS), a member of the Université du Québec network.

I am actively looking for talented students interested in wireless communications, signal processing, and machine learning. Have a look at the Open Positions.

Book

[B1] P. Giard, C. Thibeault, and W. J. Gross, High-Speed Decoders for Polar Codes, Springer, 2017, ISBN: 978-3-319-59781-2. [DOI]

Journals

[J15] C. Pillet, I. Sagitov, V. Bioglio, and P. Giard, “Shortened Polar Codes Under Automorphism Ensemble Decoding”, IEEE Commun. Lett., vol. 28, no. 4, pp. 773—777, Apr. 2024. [DOI][PRE-PRINT]
[J14] D. Barragán Guerrero, M. Au, G. Gagnon, F. Gagnon, and P. Giard, “Early-Detection Schemes Based on Sequential Tests for Low-Latency Communications”, EURASIP J. Wireless Commun. Netw., Mar. 2023. [DOI]
[J13] S. Gelincik, C. Pillet, and P. Giard, “Dynamic Frozen-Function Design for Reed-Muller Codes with Automorphism-Based Decoding”, IEEE Commun. Lett., vol. 27, no. 2, pp. 497—501, Feb. 2023. [DOI][PRE-PRINT]
[J12] N. Nguyen, T. Bui, G. Gagnon, P. Giard, and G. Kaddoum, “Designing a Pseudo-Random Bit Generator with a Novel 5D-Hyperchaotic System”, IEEE Trans. Ind. Electron., vol. 69, no. 6, pp. 6101—6110, Jun. 2021. [DOI][PRE-PRINT]
[J11] J.-F. Têtu, L.-C. Trudeau, M. Van Beirendonck, A. Balatsoukas-Stimming, and P. Giard, “A Standalone FPGA-based Miner for Lyra2REv2 Cryptocurrencies”, IEEE Trans. Circuits Syst. I, vol. 67, no. 4, pp. 1194—1206, Feb. 2020, invited paper. [DOI][PRE-PRINT]
[J10] P. Giard, A. Balatsoukas-Stimming, G. Sarkis, C. Thibeault, and W. J. Gross, “Fast Low-Complexity Decoders for Low-Rate Polar Codes”, Springer J. Signal Process. Syst., vol. 90, no. 5, pp. 675—685, May 2018, invited paper. [DOI][PRE-PRINT]
[J9] P. Giard, G. Sarkis, C. Leroux, C. Thibeault, and W. J. Gross, “Low-Latency Software Polar Decoders”, Springer J. Signal Process. Syst., vol. 90, no. 5, pp. 761—775, May 2018. [DOI][PRE-PRINT]
[J8] C. Condo, P. Giard, F. Leduc-Primeau, G. Sarkis, and W. J. Gross, “A 9.52 dB NCG FEC scheme and 162 b/cycle low-complexity product decoder architecture”, IEEE Trans. Circuits Syst. I, vol. 65, no. 4, pp. 1420—1431, Apr. 2018. [DOI][PRE-PRINT]
[J7] P. Giard, A. Balatsoukas-Stimming, T. C. Müller, A. Bonetti, C. Thibeault, W. J. Gross, P. Flatresse, and A. Burg, “PolarBear: A 28-nm FD-SOI ASIC for Decoding of Polar Codes”, IEEE J. Emerg. Sel. Topics Circuits Syst., vol. 7, no. 4, pp. 616—629, Dec. 2017. [DOI][PRE-PRINT]
[J6] P. Giard, G. Sarkis, C. Thibeault, and W. J. Gross, “Multi-Mode Unrolled Hardware Architectures for Polar Decoders”, IEEE Trans. Circuits Syst. I, vol. 63, no. 9, pp. 1443—1453, Sep. 2016. [DOI][PRE-PRINT]
[J5] G. Sarkis, I. Tal, P. Giard, A. Vardy, C. Thibeault, and W. J. Gross, “Flexible and Low-Complexity Encoding and Decoding of Systematic Polar Codes”, IEEE Trans. Commun., vol. 64, no. 7, pp. 2732—2745, Jul. 2016. [DOI][PRE-PRINT]
[J4] F. Escribano, G. Kaddoum, A. Wagemakers, and P. Giard, “Design of a New Differential Chaos Shift Keying System For Continuous Mobility”, IEEE Trans. Commun., vol. 64, no. 5, pp. 2066—2078, May 2016. [DOI]
[J3] G. Sarkis, P. Giard, A. Vardy, C. Thibeault, and W. J. Gross, “Fast List Decoders for Polar Codes”, IEEE J. Sel. Areas Commun. - Special Issue on Recent Advances In Capacity Approaching Codes, vol. 34, no. 2, pp. 318—328, Feb. 2016. [DOI][PRE-PRINT]
[J2] P. Giard, G. Sarkis, C. Thibeault, and W. J. Gross, “237 Gbit/s Unrolled Hardware Polar Decoder”, IET Electron. Lett., vol. 51, no. 10, pp. 762—763, May 2015. [DOI][PRE-PRINT]
[J1] G. Sarkis, P. Giard, A. Vardy, C. Thibeault, and Warren J. Gross, “Fast Polar Decoders: Algorithm and Implementation”, IEEE J. Sel. Areas Commun., vol. 32, no. 5, pp. 946—957, May 2014. [DOI][PRE-PRINT]

Conferences and Workshops

[C24] P. Giard, S.A.A. Shah, A. Balatsoukas-Stimming, M. Stark, and G. Bauch, “Unrolled and Pipelined Decoders based on Look-Up Tables for Polar Codes”, Int. Symp. on Topics in Coding (ISTC), Sep. 2023, pp. 1—5, Brest, FRA. [DOI][PRE-PRINT]
[C23] C. Pillet, V. Bioglio, and P. Giard, “On the Distribution of Partially Symmetric Codes for Automorphism Ensemble Decoding”, IEEE Inf. Theory Workshop (ITW), Apr. 2023, pp. 36—41, Saint-Malo, FRA. [DOI][PRE-PRINT]
[C22] I. Sagitov, C. Pillet, A. Balatsoukas-Stimming, and P. Giard, “Successive-Cancellation Flip Decoding of Polar Codes with a Simplified Restart Mechanism”, IEEE Wireless Commun. and Netw. Conf. (WCNC), Mar. 2023, pp. 1—6, Glasgow, GBR. [DOI][PRE-PRINT]
[C21] I. Sagitov and P. Giard, “An Early-Stopping Mechanism for DSCF Decoding of Polar Codes”, IEEE Int. Workshop on Signal Process. Syst. (SiPS), Oct. 2020, pp. 1—6, Virtual. [DOI][PRE-PRINT]
[C20] D. Barragán Guerrero, M. Au, G. Gagnon, F. Gagnon, and P. Giard, “Early Detection for Optimal-Latency Communications in Multi-Hop Links”, Int. Symp. on Wireless Commun. Syst. (ISWCS), Aug 2019, Oulu, FIN. [DOI][PRE-PRINT]
[C19] M. Van Beirendonck, L.-C. Trudeau, P. Giard, and A. Balatsoukas-Stimming, “A Lyra2 FPGA Core for Lyra2REv2-Based Cryptocurrencies”, IEEE Int. Symp. on Circuits and Syst. (ISCAS), May 2019, Sapporo, JPN. [DOI][PRE-PRINT]
[C18] P. Giard, A. Balatsoukas-Stimming, and A. Burg, “On the Tradeoff Between Accuracy and Complexity in Blind Detection of Polar Codes”, Int. Symp. on Turbo Codes & Iterative Inf. Process. (ISTC), Dec 2018, Hong Kong, HKG. [DOI][PRE-PRINT]
[C17] P. Giard and A. Burg, “Fast-SSC-Flip Decoding of Polar Codes”, IEEE Wireless Commun. and Netw. Conf. (WCNC), Apr 2018, pp. 73—77, Barcelone, ESP. [DOI][PRE-PRINT]
[C16] P. Giard, A. Balatsoukas-Stimming, and A. Burg, “Blind Detection of Polar Codes”, IEEE Int. Workshop on Signal Process. Syst. (SiPS), Oct. 2017, pp. 1—6, Lorient, FRA. [DOI][PRE-PRINT]
[C15] A. Balatsoukas-Stimming, P. Giard, and A. Burg, “A Comparison of Polar Decoders with Existing LDPC and Turbo Decoders”, IEEE Wireless Commun. and Netw. Conf. (WCNC), Mar. 2017, pp. 1—6, San Francisco, CA, USA. [DOI][PRE-PRINT]
[C14] C. Condo, F. Leduc-Primeau, G. Sarkis, P. Giard, and W. J. Gross, “Stall Pattern Avoidance in Polynomial Product Codes”, IEEE Global Conf. on Signal and Inf. Process. (GlobalSIP), Dec. 2016, pp. 699—702, Arlington, VA, USA. [DOI][PRE-PRINT]
[C13] P. Giard, A. Balatsoukas-Stimming, T. C. Müller, A. Burg, C. Thibeault, and W. J. Gross, “A Multi-Gbps Unrolled Hardware List Decoder for a Systematic Polar Code”, Asilomar Conf. on Signals, Syst., and Comput. (ACSSC), Nov. 2016, pp. 1194—1198, Pacific Grove, CA, USA. [DOI][PRE-PRINT]
[C12] P. Giard, G. Sarkis, A. Balatsoukas-Stimming, Y. Fan, C.-y. Tsui, A. Burg, C. Thibeault, and W. J. Gross, “Hardware Decoders for Polar Codes: An Overview”, IEEE Int. Symp. on Circuits and Syst. (ISCAS), May 2016, pp. 149—152, Montréal, CAN. [DOI][PRE-PRINT]
[C11] S. A. Hashemi, A. Balatsoukas-Stimming, P. Giard, C. Thibeault, and W. J. Gross, “Partitioned Successive-Cancellation List Decoding of Polar Codes”, IEEE Int. Conf. on Acoustics, Speech, and Signal Process. (ICASSP), Mar. 2016, pp. 957—960, Shanghai, CHN. [DOI]
[C10] P. Giard, G. Sarkis, C. Thibeault, and W. J. Gross, “A 638 Mbps Low-Complexity Rate 1/2 Polar Decoder on FPGAs”, IEEE Int. Workshop on Signal Process. Syst. (SiPS), Oct. 2015, pp. 1—6, Hangzhou, CHN. [DOI]
[C9] G. Sarkis, P. Giard, C. Thibeault, and W. J. Gross, “Autogenerating Software Polar Decoders”, IEEE Global Conf. on Signal and Inf. Process. (GlobalSIP), Dec. 2014, pp. 6—10, Atlanta, USA. [DOI]
[C8] G. Sarkis, P. Giard, A. Vardy, C. Thibeault, and W. J. Gross, “Increasing the Speed of Polar List Decoders”, IEEE Int. Workshop on Signal Process. Syst. (SiPS), Oct. 2014, pp. 1—6, Belfast, GBR. [DOI][PRE-PRINT]
[C7] P. Giard, G. Sarkis, C. Thibeault, and W. J. Gross, “Fast Software Polar Decoders”, IEEE Int. Conf. on Acoustics, Speech, and Signal Process. (ICASSP), May 2014, pp. 7555—7559, Florence, ITA. [DOI][PRE-PRINT]
[C6] G. Kaddoum and P. Giard, “Analog Network Coding for Multi-User Spread-Spectrum Communication Systems”, IEEE Wireless Commun. and Netw. Conf. (WCNC), Apr. 2014, pp. 352—357, Istanbul, TUR. [DOI][PRE-PRINT]
[C5] P. Giard, G. Kaddoum, F. Gagnon, and C. Thibeault, “FPGA Implementation and Evaluation of Discrete-time Chaotic Generators Circuits”, Ann. Conf. of the IEEE Ind. Electron. Soc. (IECON), Oct. 2012, pp. 3221—3224, Montreal, CAN. [DOI]
[C4] F. Leduc-Primeau, A. J. Raymond, P. Giard, C. Thibeault, and W. J. Gross, “High-Throughput LDPC Decoding Using the RHS Algorithm”, Conf. on Design and Archit. for Signal and Image Process. (DASIP), Oct. 2012, Karlsruhe, DEU. [URL]
[C3] G. Kaddoum, J. Olivain, G. Beaufort Samson, P. Giard, and F. Gagnon, “Implementation of a Differential Chaos Shift Keying communication system in GNU Radio”, Int. Symp. on Wireless Commun. Syst. (ISWCS), Aug. 2012, pp. 934—938, Paris, FRA. [DOI]
[C2] M. Joliveau, P. Giard, M. Gendreau, F. Gagnon, and C. Thibeault, “Design of low complexity multiplierless digital filters with optimized free structure using a population-based metaheuristic”, Int. Symp. on Signals, Circuits and Syst. (ISSCS), Jun. 2011, pp. 1—4, Iaşi, ROU. [DOI]
[C1] P. Giard, J.-F. Boland, and J. Belzile, “CORBA communication backplane for design and verification”, Microsyst. and Nanoelectron. Research Conf. (MNRC), Oct. 2008, pp. 121—124, Ottawa, CAN. [DOI]

Presentations and Invited Talks

[P10] P. Giard, “On the Challenges and Opportunities in Error-Correction Solutions”, ReSMiQ Seminars, École de technologie supérieure (ÉTS), Montréal, Canada, Nov. 2023.
[P9] P. Giard, “Implementation Aspects of Forward Error-Correction Solutions”, Annu. LaCIME Congr., École de technologie supérieure (ÉTS), Montréal, Canada, Feb. 2019.
[P8] P. Giard, “Polar codes: algorithms and implementation aspects”, Arbeitsgemeinschaft in Codierungstheorie und Kryptographie, Université de Neuchâtel (UniNE), Neuchâtel, Switzerland, Jun. 2018, (invited by Dr Hugues Mercier).
[P7] P. Giard, A. Balatsoukas-Stimming, and A. Burg, “Blind Detection of Polar Codes”, Inf. Theory and Appl. Workshop (ITA), San Diego, CA, USA, Feb. 2018.
[P6] N. Preyss, P. Giard, A. Balatsoukas-Stimming, and A. Burg, “Polar Codes and APSK Modulation - Just Good Friends”, Inf. Theory and Appl. Workshop (ITA), San Diego, CA, USA, Feb. 2017.
[P5] P. Giard, “Fast Software and Hardware Polar Decoders: Algorithms, Architectures, and Implementations”, Ecole polytechnique fédérale de Lausanne (EPFL), Lausanne, Switzerland, Nov. 2015, (invited by Prof. Andreas Burg).
[P4] P. Giard and A. Raymond, “Polar FEC Codes Running at Hundreds of Mbit/s in GNU Radio”, GNU Radio Conf. (GRCon), Washington, DC, USA, Aug. 2015. [VIDEO]
[P3] P. Giard, J.-F. Boland, and J. Belzile, “CORBA-Based Co-Verification Methodology For SystemC”, North American SystemC User Group (NASCUG) Meeting, San Jose, CA, USA, Feb. 2008.
[P2] P. Giard, J.-F. Boland, and J. Belzile, “CORBA-Based Communication for Verification”, CMC Microsyst. Ann. Symp., Ottawa, ON, CAN, Oct. 2007.
[P1] P. Giard, J.-F. Boland, and J. Belzile, “Hardware-in-the-Loop Functional Verification Methodology”, Object Manag. Group’s Softw.-Based Commun. Workshop, Washington, DC, USA, Mar. 2007.

Theses

[T2] P. Giard, “High-Speed Decoders for Polar Codes”, Ph.D. thesis, McGill University, 2016. [URI]
[T1] P. Giard, “Dorsale de communication CORBA pour la conception et la vérification fonctionnelle de circuits électroniques numériques complexes”, Master’s thesis, École de technologie supérieure, 2009. [URI]